Thermal conductivity measurements in thin films (semiconductors,superlattices, oxides) or arrays of nanowires embedded in templates is carried out using home-made 3ω setups. Individual nanowires of different shapes and materials and ultrathin membranes are measured using suspended structures.
Another activity of the group is the micro(nano)fabrication of thermoelectric devices for microgeneration in portable applications.
In-plane thermal conductivity of sub-20 nm thick suspended mono-crystalline Si layers
We demonstrate the feasibility of obtaining suspended structures consisting in single crystalline Si layers with sub-20 nm thickness, bridging two heater/sensor platforms to perform thermal transport analysis in ultrathin layers or on more complex patterned nanostructures. We measure the thermal conductivity of a 17.5-nm-thick single crystalline Si layer by using a suspended structure developed from a silicon-on-insulator wafer, in which the Si layer bridges the suspended platforms. The obtained value of 19 Wm-1K-1 at room temperature represents a tenfold reduction with respect to bulk Si.
This design paves the way for subsequent lateral nanostructuration of the layer with lithographic techniques, to define different geometries such as Si nanowires, nanostrips or phononic grids. As a proof of concept, nanostrips of 0.5×10 µm have been defined by focused ion beam (FIB) in the ultrathin Si layer, giving a thermal conductivity which dramatically decreased to 1.7 Wm-1K-1, indicating that the structure became severely damaged (amorphization). Re-crystallization of the structure was promoted by laser annealing while monitoring the Raman spectra. The thermal conductivity of the strip increased again to a value of 9.5 Wm-1K-1, below that of the single crystalline material due to phonon scattering at the grain boundaries.
Room temperature experimental data of thermal conductivities measured on Si thin films as function of thickness.
a) FESEM image of the suspended structure employed to measure the thermal conductivity of a 17.5 nm thick monocrystalline layer, b) SEM images of the Si membrane structured into 3 strips of 0.5×10 mm by FIB, c) Raman spectra during laser annealing of one strip showing recrystallisation of the Si
Micropower thermoelectric generator from thin Si membranes
We develop a Si-based microthermogenerator build from silicon-on-insulator by using standard CMOS processing. Ultrathin single-crystalline Si membranes (100 nm) with embedded n and p-type doped regions electrically connected in series and thermally in parallel, are the active elements of the thermoelectric device generating thermo- power under various thermal gradients. This proof-of-concept device produces an output power density of 4.5 mW/cm2, under a temperature difference of 5 K, opening the way to envisage integration as wearable thermoelectrics for body energy scavenging. In addition, the proposed design permits the fabrication of multiple optimized generators on a single wafer to be connected in series to boost the voltage performance or in parallel to increase current output to match the desired application.
Schematics and optical image of a fabricated device after opening the back side. See Nano Energy (2014) 4, 73–80