Publications (most important in recent years, see DBLP, Academic, Scholar in Team pages)
Conference Paper
D. Lugones, Franco, D., Rexachs, D., Moure, J. C., Luque, E., Argollo, E., Falcón, A., Ortega, D., and Faraboschi, P.,
“High-speed network modeling for full system simulation”, in
IISWC, 2009, pp. 24-33.
J. Balladini, Suppi, R., Rexachs, D., and Luque, E.,
“Impact of parallel programming models and CPUs clock frequency on energy consumption of HPC systems”, in
AICCSA, 2011, pp. 16-21.
C. R. Rangel, Wong, A., Rexachs, D., and Luque, E.,
“Improving SPMD applications through reduced cache miss rate”, in
20th IEEE International Conference on High Performance Computing and Communications (HPCC-2018 IEEE) , Exeter, UK, 2018.
G. Santos, Fialho, L., Rexachs, D., and Luque, E.,
“Increasing the availability provided by RADIC with low overhead”, in
CLUSTER, 2009, pp. 1-8.
C. Ramon Rangel, Wong, A., Rexachs, D., and Luque, E.,
“Mapping Policies based on Application Signature and Communication Clustering for HPC”, in
Int'l Conf. Par. and Dist. Proc. Tech. and Appl. PDPTA'18., Las Vegas, USA, 2018.
J. Villamayor, Rexachs, D., Luque, E., Montezanti, D., Giusti, A. D., and Naiouf, M.,
“A Methodology for Soft Errors Detection and Automatic Recovery”, in
2017 International Conference on High Performance Computing Simulation (HPCS), 2017.
D. Lugones, Franco, D., Argollo, E., and Luque, E.,
“Models for high-speed interconnection networks performance analysis”, in
MASCOTS, 2009, pp. 1-4.
G. Zarza, Lugones, D., Franco, D., and Luque, E.,
“A Multipath Fault-Tolerant Routing Method for High-Speed Interconnection Networks”, in
Euro-Par, 2009, pp. 1078-1088.
G. Zarza, Lugones, D., Franco, D., and Luque, E.,
“Non-blocking Adaptive Cycles: Deadlock Avoidance for Fault-tolerant Interconnection Networks”, in
IEEE International Conference on Cluster Computing Workshops, 2010, pp. 1–4.
Pages